[PATCH] D94024: [RISCV] Clear isCodeGenOnly flag on VMSGE(U) pseudo instructions. Remove InstAliases that duplicate the asm strings in the pseudos.

[Craig Topper via Phabricator via llvm-commits]

craig.topper created this revision.
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The Pseudo class sets isCodeGenOnly=1 which causes the asm strings
in the pseudos to be ignored. I think this is why the aliases are
needed at all.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D94024

Files:
  llvm/lib/Target/RISCV/RISCVInstrInfoV.td


Index: llvm/lib/Target/RISCV/RISCVInstrInfoV.td
===================================================================
--- llvm/lib/Target/RISCV/RISCVInstrInfoV.td
+++ llvm/lib/Target/RISCV/RISCVInstrInfoV.td
@@ -618,7 +618,8 @@
                 (VMSGT_VI VR:$vd, VR:$va, simm5_plus1:$imm,
                  VMaskOp:$vm), 0>;
 
-let isAsmParserOnly = 1, hasSideEffects = 0, mayLoad = 0, mayStore = 0 in {
+let isCodeGenOnly = 0, isAsmParserOnly = 1, hasSideEffects = 0, mayLoad = 0,
+    mayStore = 0 in {
 def PseudoVMSGEU_VX : Pseudo<(outs VR:$vd),
                              (ins VR:$vs2, GPR:$rs1),
                              [], "vmsgeu.vx", "$vd, $vs2, $rs1">;
@@ -639,25 +640,6 @@
                                 [], "vmsge.vx", "$vd, $vs2, $rs1$vm, $scratch">;
 }
 
-// This apparently unnecessary alias prevents matching `vmsge{u}.vx vd, vs2, vs1` as if
-// it were an unmasked (i.e. $vm = RISCV::NoRegister) PseudoVMSGE{U}_VX_M.
-def : InstAlias<"vmsgeu.vx $vd, $va, $rs1",
-                (PseudoVMSGEU_VX VR:$vd, VR:$va, GPR:$rs1), 0>;
-def : InstAlias<"vmsge.vx $vd, $va, $rs1",
-                (PseudoVMSGE_VX VR:$vd, VR:$va, GPR:$rs1), 0>;
-def : InstAlias<"vmsgeu.vx v0, $va, $rs1, $vm, $vt",
-                (PseudoVMSGEU_VX_M_T V0, VR:$vt, VR:$va, GPR:$rs1,
-                                     VMaskOp:$vm), 0>;
-def : InstAlias<"vmsge.vx v0, $va, $rs1, $vm, $vt",
-                (PseudoVMSGE_VX_M_T V0, VR:$vt, VR:$va, GPR:$rs1,
-                                    VMaskOp:$vm), 0>;
-def : InstAlias<"vmsgeu.vx $vd, $va, $rs1, $vm",
-                (PseudoVMSGEU_VX_M VRNoV0:$vd, VR:$va, GPR:$rs1,
-                                   VMaskOp:$vm), 0>;
-def : InstAlias<"vmsge.vx $vd, $va, $rs1, $vm",
-                (PseudoVMSGE_VX_M VRNoV0:$vd, VR:$va, GPR:$rs1,
-                                  VMaskOp:$vm), 0>;
-
 // Vector Integer Min/Max Instructions
 defm VMINU_V : VALU_IV_V_X<"vminu", 0b000100>;
 defm VMIN_V : VALU_IV_V_X<"vmin", 0b000101>;


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