[PATCH] D91435: [AMDGPU] Split edge to make si_if dominate end_cf

[Alexander via Phabricator via llvm-commits]

alex-t added inline comments.


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Comment at: llvm/test/CodeGen/AMDGPU/virtual-register-defs-dont-dominate-all-uses.ll:3
+; RUN: opt -S -si-annotate-control-flow -mtriple=amdgcn-amdhsa -verify-machineinstrs < %s | FileCheck -check-prefix=SI-OPT %s
+
+define hidden void @blam() {
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arsenm wrote:
> arsenm wrote:
> > Can you also add an llc run line?
> Test file name should also be more descriptive of the underlying cause
What do you need it for? The purpose of the test is to check that we don't hit an assert.
It also checks the output.  
Do you want to ensure if it may be compiled down to the ISA?
Both opt and llc in the same file are inconvenient because is tricky to re-generate the checks if changed.
Moreover. the second case with a loop is only reproducible by running the -si-annotate-control-flow explicitly by opt. Running this case by llc will test nothing because the desired CFG pattern only appears compiling by clang. CFG structurizer will produce structured CFG if the test is launched with LLC. 
When running clang the CFG pattern remains unchanged because RegionInfo cannot distinguish the regions and report the whole function as one region. Hence the CFG structurizer does nothing. While running LLC with the same IR RegionPass is able to distinguish regions and structurizer does it's job well, so we don't face the pattern causing the bug.


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  https://reviews.llvm.org/D91435/new/

https://reviews.llvm.org/D91435