[PATCH] D93312: [RISCV] Add ISel support for RVV .vx and .vi forms

Tue Dec 22 08:59:14 PST 2020

craig.topper added a comment.

In D93312#2467477 <https://reviews.llvm.org/D93312#2467477>, @frasercrmck wrote:

> In D93312#2466767 <https://reviews.llvm.org/D93312#2466767>, @craig.topper wrote:
>
>> Would it make sense to move the SDNode patterns and their helpers to a different file. They use the pseudos but are otherwise independent. I worry that RISCVInstrInfoVPseudos.td is going to become very large and this might be a logical piece to split out.
>
> Could do. I agree the file is going to get unwieldy. However I'd personally find it a bit odd if the RISCVInstrInfoVPseudos.td file contains the pseudos and the intrinsic patterns but not the SDNode patterns. Maybe that's because I view the SDNode support as more "first-class" than intrinsics. I'm assuming you're saying "SDNode" here as opposed to intrinsics, because the intrinsics are technically SDNodes. We just don't have a better terminology.

I said SDNode because that seemed to be the naming convention being used for them. I singled them out because right now you’re the only one working on them. We have a lot of intrinsic patches in flight that I didn’t want to interfere with. I don’t know which to view as more first class. The intrinsics will have full instruction coverage. Maybe we put all patterns in separate files. And leave the instructions by themselves. We’re also going to need to support fixed vectors and Simon Moll’s VP intrinsics.

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https://reviews.llvm.org/D93312