[PATCH] D93608: [RISCV] Add intrinsics for vslide1up/down, vfslide1up/down instruction
ShihPo Hung via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Dec 21 22:20:33 PST 2020
arcbbb marked 3 inline comments as done.
arcbbb added inline comments.
================
Comment at: llvm/test/CodeGen/RISCV/rvv/vfslide1up-rv32.ll:14
+; CHECK-NEXT: vsetvli a0, a1, e16,mf4,ta,mu
+; CHECK-NEXT: vfslide1up.vf v16, v16, ft0
+; CHECK-NEXT: jalr zero, 0(ra)
----------------
craig.topper wrote:
> Is the earlyclobber constraint not working here?
my local build is not clean. let my rebuild & update this again.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D93608/new/
https://reviews.llvm.org/D93608
More information about the llvm-commits
mailing list