[PATCH] D93660: [WebAssembly][NFC] Refactor SIMD load/store tablegen defs

[Thomas Lively via Phabricator via llvm-commits]

tlively added a comment.

In D93660#2467233 <https://reviews.llvm.org/D93660#2467233>, @aheejin wrote:

> Wow, I didn't know we can do OOP in TableGen! (Are these new functionalities?)

Looking at the git logs, it looks like `defvar` was introduced in January in https://reviews.llvm.org/D71407. I think defining records to collect data and passing them as parameters to other records has been possible for a long time, but I certainly didn't realize that when I was first learning tablegen 2+ years ago.

In case you're interested, here's a lightning talk from the 2019 LLVM developers meeting about functional programming in tablegen: https://www.youtube.com/watch?v=dIEVUlsiktQ. IIRC, catching the last few minutes of that talk in person is what made me start thinking that maybe there was some way to make our SIMD tablegen nicer.



================
Comment at: llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td:57-58
+  let lane_idx = LaneIdx16;
+  let prefix = "i8x16";
+  let vprefix = "v8x16";
+}
----------------
aheejin wrote:
> Do we need to separately maintain 4 different fields with the same info:
> `I8x16` (in def), `vt` (`v16i8`), `prefix` (`i8x16`), and `vprefix` (`v8x16`)
> Maybe it can be hard to unify all of these, but can we merge some?
Unfortunately we need all of these as far as I can see:

 - The record name (`I8x16`) needs to be distinct from the name of anything else we might need to reference.
 - We need the `vt`; it is probably the most commonly used member.
 - `prefix` and `vprefix` appear in instruction names, so we need them, too.

In principle we could possibly construct some of these members from other members using string manipulations and `!cast`. But unless we want to write the code for that at every use site, we would need to store the results somewhere so they can be reused. It's simplest to just store them as fields on the `Vec` in the first place.




Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D93660/new/

https://reviews.llvm.org/D93660