[PATCH] D93608: [RISCV] Add intrinsics for vslide1up/down, vfslide1up/down instruction

[ShihPo Hung via Phabricator via llvm-commits]

arcbbb updated this revision to Diff 313232.
arcbbb added a comment.

Updates:

1. Fixed missing earlyclobber for VSLIDE1UP pseudos
2. Added missing Predicate for VSLIDE pseudos
3. updated tests with update_llc_test_checks.py


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D93608/new/

https://reviews.llvm.org/D93608

Files:
  llvm/include/llvm/IR/IntrinsicsRISCV.td
  llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
  llvm/test/CodeGen/RISCV/rvv/vfslide1down-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vfslide1down-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vfslide1up-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vfslide1up-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vslide1down-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vslide1down-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vslide1up-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vslide1up-rv64.ll

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