[PATCH] D93624: [RISCV] Fix rounding mode in lowering of float operations

Serge Pavlov via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Dec 21 03:17:03 PST 2020


sepavloff created this revision.
sepavloff added reviewers: asb, craig.topper.
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LLVM IR nodes like 'fadd', 'fmul' and other are assumed to execute in the
default floating-point environment, which in turn assumes rounding to
nearest even. In RISCV these operations were mapped to dynamic rounding
variants. This change fixes this by mapping to instructions with RNE
argument.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D93624

Files:
  llvm/lib/Target/RISCV/RISCVInstrInfoD.td
  llvm/lib/Target/RISCV/RISCVInstrInfoF.td
  llvm/test/CodeGen/RISCV/double-arith.ll
  llvm/test/CodeGen/RISCV/float-arith.ll

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