[PATCH] D93612: [RISCV] Update V instructions constraints to conform to v1.0
Hsiangkai Wang via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sun Dec 20 23:22:00 PST 2020
HsiangKai created this revision.
HsiangKai added reviewers: craig.topper, evandro, frasercrmck, rogfer01.
Herald added subscribers: NickHung, luismarques, apazos, sameer.abuasal, pzheng, s.egerton, lenary, Jim, benna, psnobl, jocewei, PkmX, the_o, brucehoult, MartinMosbeck, edward-jones, zzheng, jrtc27, shiva0217, kito-cheng, niosHD, sabuasal, simoncook, johnrusso, rbar, asb, hiraditya.
HsiangKai requested review of this revision.
Herald added a subscriber: MaskRay.
Herald added a project: LLVM.
Upgrade RISC-V V extension to v1.0-08a0b46.
Update instruction constraints to conform to v1.0.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D93612
Files:
llvm/lib/Target/RISCV/RISCVInstrFormats.td
llvm/lib/Target/RISCV/RISCVInstrInfoV.td
llvm/lib/Target/RISCV/Utils/RISCVBaseInfo.h
llvm/test/MC/RISCV/rvv/invalid.s
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