[PATCH] D93312: [RISCV] Add ISel support for RVV .vx and .vi forms

Kito Cheng via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sat Dec 19 19:11:51 PST 2020


kito-cheng added a comment.

64 bit splat on rv32 code gen sequence is LGTM, but I think that's all I can review :P


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D93312/new/

https://reviews.llvm.org/D93312



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