[PATCH] D93471: [RISCV] Define vlxe/vsxe/vsuxe intrinsics.
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Dec 18 13:53:40 PST 2020
craig.topper accepted this revision.
craig.topper added a comment.
This revision is now accepted and ready to land.
LGTM with those comments fixed
================
Comment at: llvm/include/llvm/IR/IntrinsicsRISCV.td:162
+ // For indexed store
+ // Input: (vector_in, pointer, stride, vl)
+ class RISCVIStore
----------------
stride here should be index?
================
Comment at: llvm/include/llvm/IR/IntrinsicsRISCV.td:170
+ // For indexed store with mask
+ // Input: (vector_in, index, stirde, mask, vl)
+ class RISCVIStoreMask
----------------
stirde he should be index?
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D93471/new/
https://reviews.llvm.org/D93471
More information about the llvm-commits
mailing list