[PATCH] D93561: [X86] Avoid generating invalid R_X86_64_GOTPCRELX relocations

[Harald van Dijk via Phabricator via llvm-commits]

hvdijk created this revision.
hvdijk added reviewers: craig.topper, RKSimon, MaskRay.
Herald added subscribers: pengfei, hiraditya.
hvdijk requested review of this revision.
Herald added a project: LLVM.
Herald added a subscriber: llvm-commits.

We need to make sure not to emit R_X86_64_GOTPCRELX relocations for instructions that use a REX prefix. If a REX prefix is present, we need to instead use a R_X86_64_REX_GOTPCRELX relocation. The existing logic for CALL64m, JMP64m, etc. already handles this by checking the HasREX parameter and using it to determine which relocation type to use. Do this for all instructions that can use relaxed relocations.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D93561

Files:
  llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
  llvm/test/MC/X86/gotpcrelx.s


Index: llvm/test/MC/X86/gotpcrelx.s
===================================================================
--- llvm/test/MC/X86/gotpcrelx.s
+++ llvm/test/MC/X86/gotpcrelx.s
@@ -17,6 +17,16 @@
 # CHECK-NEXT:     R_X86_64_GOTPCRELX xor
 # CHECK-NEXT:     R_X86_64_GOTPCRELX call
 # CHECK-NEXT:     R_X86_64_GOTPCRELX jmp
+# CHECK-NEXT:     R_X86_64_REX_GOTPCRELX mov
+# CHECK-NEXT:     R_X86_64_REX_GOTPCRELX test
+# CHECK-NEXT:     R_X86_64_REX_GOTPCRELX adc
+# CHECK-NEXT:     R_X86_64_REX_GOTPCRELX add
+# CHECK-NEXT:     R_X86_64_REX_GOTPCRELX and
+# CHECK-NEXT:     R_X86_64_REX_GOTPCRELX cmp
+# CHECK-NEXT:     R_X86_64_REX_GOTPCRELX or
+# CHECK-NEXT:     R_X86_64_REX_GOTPCRELX sbb
+# CHECK-NEXT:     R_X86_64_REX_GOTPCRELX sub
+# CHECK-NEXT:     R_X86_64_REX_GOTPCRELX xor
 # CHECK-NEXT:   }
 
 # NORELAX-NEXT:     R_X86_64_GOTPCREL mov
@@ -31,6 +41,16 @@
 # NORELAX-NEXT:     R_X86_64_GOTPCREL xor
 # NORELAX-NEXT:     R_X86_64_GOTPCREL call
 # NORELAX-NEXT:     R_X86_64_GOTPCREL jmp
+# NORELAX-NEXT:     R_X86_64_GOTPCREL mov
+# NORELAX-NEXT:     R_X86_64_GOTPCREL test
+# NORELAX-NEXT:     R_X86_64_GOTPCREL adc
+# NORELAX-NEXT:     R_X86_64_GOTPCREL add
+# NORELAX-NEXT:     R_X86_64_GOTPCREL and
+# NORELAX-NEXT:     R_X86_64_GOTPCREL cmp
+# NORELAX-NEXT:     R_X86_64_GOTPCREL or
+# NORELAX-NEXT:     R_X86_64_GOTPCREL sbb
+# NORELAX-NEXT:     R_X86_64_GOTPCREL sub
+# NORELAX-NEXT:     R_X86_64_GOTPCREL xor
 # NORELAX-NEXT:   }
 
 movl mov at GOTPCREL(%rip), %eax
@@ -46,6 +66,17 @@
 call *call at GOTPCREL(%rip)
 jmp *jmp at GOTPCREL(%rip)
 
+movl mov at GOTPCREL(%rip), %r8d
+test %r8d, test at GOTPCREL(%rip)
+adc adc at GOTPCREL(%rip), %r8d
+add add at GOTPCREL(%rip), %r8d
+and and at GOTPCREL(%rip), %r8d
+cmp cmp at GOTPCREL(%rip), %r8d
+or  or at GOTPCREL(%rip), %r8d
+sbb sbb at GOTPCREL(%rip), %r8d
+sub sub at GOTPCREL(%rip), %r8d
+xor xor at GOTPCREL(%rip), %r8d
+
 # COMMON-NEXT:   Section ({{.*}}) .rela.norelax {
 # COMMON-NEXT:     R_X86_64_GOTPCREL mov 0x0
 # COMMON-NEXT:     R_X86_64_GOTPCREL mov 0xFFFFFFFFFFFFFFFC
Index: llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
===================================================================
--- llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
+++ llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
@@ -409,6 +409,12 @@
       switch (Opcode) {
       default:
         return X86::reloc_riprel_4byte;
+      case X86::MOV64rm:
+        // movq loads is a subset of reloc_riprel_4byte_relax_rex. It is a
+        // special case because COFF and Mach-O don't support ELF's more
+        // flexible R_X86_64_REX_GOTPCRELX relaxation.
+        assert(HasREX);
+        return X86::reloc_riprel_4byte_movq_load;
       case X86::ADC32rm:
       case X86::ADD32rm:
       case X86::AND32rm:
@@ -419,13 +425,6 @@
       case X86::SUB32rm:
       case X86::TEST32mr:
       case X86::XOR32rm:
-        return X86::reloc_riprel_4byte_relax;
-      case X86::MOV64rm:
-        // movq loads is a subset of reloc_riprel_4byte_relax_rex. It is a
-        // special case because COFF and Mach-O don't support ELF's more
-        // flexible R_X86_64_REX_GOTPCRELX relaxation.
-        assert(HasREX);
-        return X86::reloc_riprel_4byte_movq_load;
       case X86::CALL64m:
       case X86::JMP64m:
       case X86::TAILJMPm64:


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