[PATCH] D93366: [RISCV] Define vsadd/vsaddu/vssub/vssubu intrinsics.

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


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Comment at: llvm/include/llvm/IR/IntrinsicsRISCV.td:188
+                    [IntrNoMem, IntrHasSideEffects]>, RISCVVIntrinsic {
+    let ExtendOperand = 3;
+  }
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Can we make this ExtendOperand = 2 and add 1 when we use it in LowerIntrinsic_W_CHAIN? It's a little confusing to have to account for the chain operand of the SelectionDAG representation here.

It's already a little confusing that we're accounting for the intrinsic number operand of SelectionDAG but at least that's a consistent rule.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D93366/new/

https://reviews.llvm.org/D93366