[PATCH] D93366: [RISCV] Define vsadd/vsaddu/vssub/vssubu intrinsics.

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:1083
+              DAG.getNode(ISD::ANY_EXTEND, DL, Subtarget.getXLenVT(), ScalarOp);
+          SDVTList VTs = DAG.getVTList(Op.getValueType(), MVT::Other);
+          return DAG.getNode(ISD::INTRINSIC_W_CHAIN, DL, VTs, Operands);
----------------
You can use Op.getVTList() here to get the original VTs without needing to recreate it.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D93366/new/

https://reviews.llvm.org/D93366