[PATCH] D93445: [RISCV] Define vlse/vsse intrinsics.

[Zakk Chen via Phabricator via llvm-commits]

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Define vlse/vsse intrinsics and lower to V instructions.

We work with @rogfer01 from BSC to come out this patch.

Authored-by: Roger Ferrer Ibanez <rofirrim at gmail.com>
Co-Authored-by: Zakk Chen <zakk.chen at sifive.com>


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D93445

Files:
  llvm/include/llvm/IR/IntrinsicsRISCV.td
  llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
  llvm/test/CodeGen/RISCV/rvv/vlse-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vlse-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vsse-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vsse-rv64.ll

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