[PATCH] D93312: [RISCV] Add ISel support for RVV .vx and .vi forms
Fraser Cormack via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Dec 16 10:04:52 PST 2020
frasercrmck updated this revision to Diff 312249.
frasercrmck added a comment.
re-add dropped changes
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D93312/new/
https://reviews.llvm.org/D93312
Files:
llvm/lib/Target/RISCV/RISCVISelLowering.cpp
llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
llvm/test/CodeGen/RISCV/rvv/vadd-sdnode-rv32.ll
llvm/test/CodeGen/RISCV/rvv/vadd-sdnode-rv64.ll
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