[PATCH] D93370: [PowerPC] Add new infrastructure to select load/store instructions, update P8/P9 load/store patterns.

Amy Kwan via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Dec 15 22:37:08 PST 2020


amyk created this revision.
amyk added reviewers: PowerPC, power-llvm-team, nemanjai.
amyk added projects: LLVM, PowerPC.
Herald added subscribers: shchenz, jfb, hiraditya.
amyk requested review of this revision.

This patch introduces a new infrastructure that is used to select the load and store instructions in the PPC backend.

The idea of this refactoring is that it introduces a set of addressing modes that correspond to different instruction formats 
of a particular load and store instruction, along with a set of common flags that describes a load/store. Whenever a load/store
instruction is being selected, we analyze the instruction and compute a set of flags for it. The computed flags are then used to 
select the most optimal load/store addressing mode.

This computation of flags is done in `computeMOFlags()`, while selecting the optimal addressing mode is done through 
`getAddrModeForFlags()`; in which this functions searches for a set of address flags stored in a map that relates common flags to
addressing modes. Once the optimal addressing mode is determined, this information is given to `SelectOptimalAddrMode()`,
where we set the base and displacement of the load/store accordingly based on the addressing mode.

Another thing to note is the `SelectForceXForm()` function is similar to `SelectAddressRegRegOnly()`, with an updated naming
and a removed condition to better suit the refactoring that is being done on the loads/stores.

This patch is the first of a series of patches to be committed - it contains the initial implementation of the refactored load/store
selection infrastructure and also updates P8 <https://reviews.llvm.org/P8>/P9 <https://reviews.llvm.org/P9> patterns to adopt this infrastructure. The idea is that incremental patches will
add more implementation and support, and eventually the old implementation will be removed.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D93370

Files:
  llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
  llvm/lib/Target/PowerPC/PPCISelLowering.cpp
  llvm/lib/Target/PowerPC/PPCISelLowering.h
  llvm/lib/Target/PowerPC/PPCInstr64Bit.td
  llvm/lib/Target/PowerPC/PPCInstrAltivec.td
  llvm/lib/Target/PowerPC/PPCInstrInfo.td
  llvm/lib/Target/PowerPC/PPCInstrVSX.td

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D93370.312110.patch
Type: text/x-patch
Size: 121963 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20201216/0ac29d53/attachment-0001.bin>


More information about the llvm-commits mailing list