[PATCH] D93359: [RISCV] Define vle/vse intrinsics.

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


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Comment at: llvm/include/llvm/IR/IntrinsicsRISCV.td:205
+  foreach eew = [8, 16, 32, 64] in {
+    defm "vle" # eew: RISCVUSLoad;
+    defm "vse" # eew: RISCVUSStore;
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Do we really need a separate intrinsic for each eew? Can't we infer eew from the element type of the result?


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D93359/new/

https://reviews.llvm.org/D93359