[PATCH] D93365: [RISCV] Add intrinsics for vmv.x.s and vmv.s.x

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


================
Comment at: llvm/test/CodeGen/RISCV/rvv/vmv.x.s-rv32.ll:6
+
+define signext i8 @intrinsic_vmv.x.s_s_i8_nxv1i8(<vscale x 1 x i8> %0) nounwind {
+; CHECK-LABEL: intrinsic_vmv.x.s_s_i8_nxv1i8:
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The signext attribute on the results here gives test coverage on the computeNumSignBitsForTargetNode change.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D93365/new/

https://reviews.llvm.org/D93365