[PATCH] D93312: [RISCV] Add ISel support for RVV .vx and .vi forms

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:347
+
+    for (auto VT : MVT::integer_scalable_vector_valuetypes())
+      setOperationAction(ISD::SPLAT_VECTOR, VT, Legal);
----------------
craig.topper wrote:
> I'm not sure this should be all scalable types. Typically we only mark the legal types.
On second thought, I guess this is ok since we're marking it Legal. Its no different than an operation that defaults to legal. But we are probably going to have to do something different for i1 vectors.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D93312/new/

https://reviews.llvm.org/D93312