[PATCH] D92951: AMDGPU: If a store defines (alias) a load, it clobbers the load.

Changpeng Fang via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Dec 14 15:40:41 PST 2020


cfang marked 2 inline comments as done.
cfang added inline comments.


================
Comment at: llvm/test/CodeGen/AMDGPU/store-clobbers-load.ll:15
+  %vaddr = bitcast [4 x i32] addrspace(5)* %alloca to <4 x i32> addrspace(5)*
+  %zero = load <4 x i32>, <4 x i32> addrspace(5)* %vaddr, align 16
+  %one = insertelement <4 x i32> %zero, i32 1, i32 1
----------------
arsenm wrote:
> Why are we bothering to annotate a private memory access in the first place? 
This is a good question. Just found that the only place that uses amdgpu.noclobber metadata is
in SITargetLowering::LowerLOAD for global address space.

Should we limit the analysis only to global address space (I am not clear whether there will be future
usage of amdgpu.noclobber)?


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