[PATCH] D92842: [RFC][SelectionDAG] Add Target-Independent Compiler Barrier
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Dec 10 08:57:36 PST 2020
craig.topper added inline comments.
================
Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:28637
+ // COMPILER_BARRIER codegens to a 0-byte instruction.
+ return SDValue(DAG.getMachineNode(TargetOpcode::COMPILER_BARRIER, dl, MVT::Other, Op.getOperand(0)), 0);
}
----------------
lenary wrote:
> craig.topper wrote:
> > Would it make sense to have a SelectionDAG::getCompilerBarrier method that would hide most of the boilerplate for creating these nodes?
> Almost certainly.
>
> One thing I did run into was I wanted to keep the ordering in the barrier around for later passes - but I ran into issues on x86 where the immediate I was using to represent it was getting allocated into a register and that caused instruction verification to fail. I could look at bringing that back if people thought it was useful (for instance, later Machine Passes may want to know if they can hoist/sink loads and stores past a barrier with more granularity than just "No").
Can you use getTargetConstant? That should never end up in a register.
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https://reviews.llvm.org/D92842/new/
https://reviews.llvm.org/D92842
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