[PATCH] D93132: [SVE][CodeGen] Vector + immediate addressing mode for masked gather/scatter

[Kerry McLaughlin via Phabricator via llvm-commits]

kmclaughlin created this revision.
kmclaughlin added reviewers: sdesmalen, david-arm, paulwalker-arm, efriedma.
Herald added subscribers: NickHung, psnobl, hiraditya, tschuett.
kmclaughlin requested review of this revision.
Herald added a project: LLVM.
Herald added a subscriber: llvm-commits.

This patch extends LowerMGATHER/MSCATTER to make use of the vector + reg/immediate
addressing modes for scalable masked gathers & scatters.

selectGatherScatterAddrMode checks if the base pointer is null, in which case
we can swap the base pointer and the index, e.g.

     getelementptr nullptr, <vscale x N x T> (splat(%offset)) + %indices)
  -> getelementptr %offset, <vscale x N x T> %indices 


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D93132

Files:
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/test/CodeGen/AArch64/sve-masked-gather-legalize.ll
  llvm/test/CodeGen/AArch64/sve-masked-gather-vec-plus-imm.ll
  llvm/test/CodeGen/AArch64/sve-masked-gather-vec-plus-reg.ll
  llvm/test/CodeGen/AArch64/sve-masked-gather.ll
  llvm/test/CodeGen/AArch64/sve-masked-scatter-legalise.ll
  llvm/test/CodeGen/AArch64/sve-masked-scatter-vec-plus-imm.ll
  llvm/test/CodeGen/AArch64/sve-masked-scatter-vec-plus-reg.ll
  llvm/test/CodeGen/AArch64/sve-masked-scatter.ll

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