[PATCH] D93048: [RISCV] Define vsub/vrsub intrinsics and refine the multiclass/class.

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Dec 10 13:50:07 PST 2020


craig.topper added a comment.

In D93048#2446197 <https://reviews.llvm.org/D93048#2446197>, @HsiangKai wrote:

> Should I combine this one with D93048 <https://reviews.llvm.org/D93048>?
>
> vsub only has .vv and .vx variants.
> vrsub only has .vx and .vi variants.
>
> I use these two instructions to reorganize multiclasses and classes in RISCVInstrInfoVPseudos.td.
>
> These two patches are related. I am not sure whether I should combine them or not.

I vote to combine them since this redoes a lot of the tablegen classes. It would be better to only have one version to review


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D93048/new/

https://reviews.llvm.org/D93048



More information about the llvm-commits mailing list