[PATCH] D92716: [VE] Correct LVLGen (LVL instruction insert pass)

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sat Dec 5 01:33:36 PST 2020


craig.topper added inline comments.


================
Comment at: llvm/lib/Target/VE/LVLGen.cpp:55
+  if (Index >= 0) {
+    assert(MI.getOperand(Index).isReg() && "VL contains not a register!");
     return MI.getOperand(Index).getReg();
----------------
getReg will assert this internally. Is this just to get a better error message?


================
Comment at: llvm/lib/Target/VE/LVLGen.cpp:77
+    // possbile.  Therefore, we use a regular scalar register to hold immediate
+    // values to load VL register.  And try to reuse identical scalar regsiters
+    // and avoid new LVLr instructions as much as possible.
----------------
regsiters->registers


================
Comment at: llvm/lib/Target/VE/LVLGen.cpp:98
       } else {
+        // Reuse previous VL register.
         LLVM_DEBUG(dbgs() << "Reuse current VL.\n");
----------------
This almost repeats the debug message but says "previous" instead of "current".


================
Comment at: llvm/lib/Target/VE/LVLGen.cpp:108
+        // The latest VL is killed, so disable HasRegForVL.
         LLVM_DEBUG(dbgs() << RegName(RegForVL) << " is killed: ");
         LLVM_DEBUG(MI->dump());
----------------
Is "killed" the right word to use here now?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D92716/new/

https://reviews.llvm.org/D92716



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