[PATCH] D92440: [dfsan] Support passing non-i16 shadow values in TLS mode

stephan.yichao.zhao via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Dec 3 13:27:19 PST 2020


stephan.yichao.zhao added a comment.

In D92440#2432047 <https://reviews.llvm.org/D92440#2432047>, @morehouse wrote:

> Why do we need the 8 byte alignment at all?  It seems a little silly to have gaps in the TLS shadow.
>
> Currently, when there's 6 params we get the following TLS pattern:
>
> `xxxxxx11xxxxxx22xxxxxx33xxxxxx44xxxxxx55xxxxxx66`
>
> where each `x` is an unused byte.

Hm,  I checked the diff <https://github.com/llvm/llvm-project/commit/d2bd319adc7cf19d6e47d3caf3b6f508f299ea57> that introduced 8-byte alignment for MSan again.

It seems that this is specific to MSan because MSan's shadow type is the same to its original type: __m128i's shadow type is also __m128i. If __m128i is set with a large alignment,
so does its shadow type. However DFSan's approach always uses i16 for all primitive types: if __m128i exists, its shadow type is still i16.

So it is not necessary to follow MSan's. I will update.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D92440/new/

https://reviews.llvm.org/D92440



More information about the llvm-commits mailing list