[PATCH] D92582: [AArch64][GlobalISel] Refactor G_BRCOND selection

[Jessica Paquette via Phabricator via llvm-commits]

paquette created this revision.
paquette added a reviewer: aemerson.
Herald added subscribers: danielkiss, hiraditya, kristof.beyls, rovka.
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`selectCompareBranch` was hard to understand.

Also, it was being needlessly pessimistic with the `ProduceNonFlagSettingCondBr` case. It assumed that everything in `selectCompareBranch` would emit a TB(N)Z or C(B)NZ. That's not true; the G_FCMP + G_BRCOND case would never emit those instructions, and the G_ICMP + G_BRCOND case was capable of emitting an integer compare + Bcc.

- Refactor `selectCompareBranch` into separate functions based off of what is feeding the G_BRCOND's condition.

- Move G_BRCOND selection code from `select` to `selectCompareBranch`.

- Remove duplicated constraint code from the code originally in `select`; `emitTestBit` already handles that, so no need to constrain twice.

- Factor out the G_FCMP + G_BRCOND case into `selectCompareBranchFedByFCmp`.

- Split the G_ICMP + G_BRCOND case into an optimization function, `tryOptCompareBranchFedByICmp` and a general selection function, `selectCompareBranchFedByICmp`.

- Reduce the number of things passed to `tryOptAndIntoCompareBranch`.

- Improve documentation.

- Give some variables more descriptive names.

Other than improving the code generation for functions with speculative_load_hardening by getting the logic correct, this is NFC.


https://reviews.llvm.org/D92582

Files:
  llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
  llvm/test/CodeGen/AArch64/GlobalISel/speculative-hardening-brcond.mir

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