[PATCH] D92324: [PowerPC] Fix altivec feature on pwr cpus pre pwr6.
Sean Fertile via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Dec 2 06:46:07 PST 2020
sfertile added inline comments.
================
Comment at: llvm/lib/Target/PowerPC/PPC.td:532-533
+// but that did not appear in any IBM systems. While VMX/Altivec was added in
+// ISA 2.03 (pwr4), the extension was optional. The first IBM processor with
+// Altivec implemented in an IBM system was Power6.
def : ProcessorModel<"pwr3", G5Model,
----------------
hubert.reinterpretcast wrote:
> Remove the last sentence here.
I think we need to keep a comment indicating the Power Systems didn't implement the optional extension to avoid having them enabled again in the future.
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https://reviews.llvm.org/D92324/new/
https://reviews.llvm.org/D92324
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