[PATCH] D92262: [RISCV] Add isel patterns for SBCLRI/SBSETI/SBINVI(W) instructions

[Craig Topper via Phabricator via llvm-commits]

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We can use these instructions for single bit immediates that are too large for ANDI/ORI/CLRI.

The _10 test cases are to make sure that we still use ANDI/ORI/CLRI for small immediates.


https://reviews.llvm.org/D92262

Files:
  llvm/lib/Target/RISCV/RISCVInstrInfoB.td
  llvm/test/CodeGen/RISCV/rv32Zbs.ll
  llvm/test/CodeGen/RISCV/rv32Zbt.ll
  llvm/test/CodeGen/RISCV/rv64Zbb.ll
  llvm/test/CodeGen/RISCV/rv64Zbs.ll

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