[PATCH] D92169: [Hexagon] Add HVX support for ISD::SMAX/SMIN/UMAX/UMIN instead of custom dag patterns

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon created this revision.
RKSimon added a reviewer: kparzysz.
Herald added subscribers: steven.zhang, hiraditya.
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Followup to D92112 <https://reviews.llvm.org/D92112> now that I've learnt about hvx type splitting.

This is some necessary cleanup work for min/max ops to eventually help us move the add/sub sat patterns into DAGCombine - D91876 <https://reviews.llvm.org/D91876>.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D92169

Files:
  llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
  llvm/lib/Target/Hexagon/HexagonPatternsHVX.td
  llvm/test/CodeGen/Hexagon/autohvx/minmax-128b.ll
  llvm/test/CodeGen/Hexagon/autohvx/minmax-64b.ll

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