[PATCH] D92105: [RISCV] Add pre-emit pass to make more instructions compressible

Jessica Clarke via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Nov 25 08:08:35 PST 2020


jrtc27 added inline comments.


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Comment at: llvm/test/CodeGen/RISCV/compress-instrs.ll:1
+; RUN: llc -mtriple=riscv32 -mattr=+c -filetype=obj < %s \
+; RUN:   | llvm-objdump -d --triple=riscv32 --mattr=+c -M no-aliases - \
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This should be a MIR test running just the new pass so it's less fragile (and can also test more interesting cases where it's hard to coerce CodeGen into creating uncompressible instructions)


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D92105/new/

https://reviews.llvm.org/D92105



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