[PATCH] D90844: [TableGen][SchedModels] Fix read/write variant substitution #2

[Eugene Leviant via Phabricator via llvm-commits]

evgeny777 updated this revision to Diff 307111.
evgeny777 added a comment.

@dmgreen Nice find again, thanks. Somehow I missed that. I've fixed the issue and checked ARM and AArch64 targets - looks good so far.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D90844/new/

https://reviews.llvm.org/D90844

Files:
  llvm/lib/Target/ARM/ARMScheduleA57.td
  llvm/utils/TableGen/CodeGenSchedule.cpp

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