[PATCH] D91931: [RISCV][GlobalISel] Select add i32, i32

[Jessica Clarke via Phabricator via llvm-commits]

jrtc27 requested changes to this revision.
jrtc27 added inline comments.
This revision now requires changes to proceed.


================
Comment at: llvm/lib/Target/RISCV/RISCVCallingConv.td:66-79
+
+let Entry = 1 in {
+  def CC_RISCV32: CallingConv<[
+    CCIfType<[i32], CCAssignToReg<[X10, X11, X12, X13, X14, X15, X16, X17]>>,
+    CCIfType<[i32], CCAssignToStack<4, 4>>
+  ]>;
+}
----------------
RISC-V calling conventions are implemented in C++ and that was a deliberate choice. Please do not duplicate what is already there (which is a huge nuisance for downstream forks like ours) and instead reuse the perfectly-good well-tested CC_RISCV that already exists. Also TableGen calling conventions are far too opaque to have any hope of actually convincing yourself they're correct in all the subtle edge-cases, whereas imperative code is clear and unambiguous.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D91931/new/

https://reviews.llvm.org/D91931