[PATCH] D90050: AMDGPU/GlobalISel: Add integer med3 combines

Petar Avramovic via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Nov 20 03:46:04 PST 2020


Petar.Avramovic updated this revision to Diff 306646.
Petar.Avramovic added a comment.

Move combines after register bank select. Check for register bank of the result register and only combine for vgpr bank. There is mir test for sgpr bank min/max input for completeness. However sgpr bank min/max are transformed to compare + select in regbankselect and we should not expect them in post regbank combiner.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D90050/new/

https://reviews.llvm.org/D90050

Files:
  llvm/include/llvm/CodeGen/GlobalISel/MIPatternMatch.h
  llvm/include/llvm/CodeGen/GlobalISel/Utils.h
  llvm/lib/CodeGen/GlobalISel/Utils.cpp
  llvm/lib/Target/AMDGPU/AMDGPUCombine.td
  llvm/lib/Target/AMDGPU/AMDGPUGISel.td
  llvm/lib/Target/AMDGPU/AMDGPURegBankCombiner.cpp
  llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
  llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
  llvm/lib/Target/AMDGPU/SIInstructions.td
  llvm/test/CodeGen/AMDGPU/GlobalISel/regbankcombiner-smed3.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/regbankcombiner-umed3.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/smed3.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/umed3.ll

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