[PATCH] D91518: [LV][NFC-ish] Allow vector widths over 256 elements
Kazushi Marukawa via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Nov 19 01:41:22 PST 2020
kaz7 added a comment.
In D91518#2404924 <https://reviews.llvm.org/D91518#2404924>, @fhahn wrote:
> dividing the widest register in bits by the smallest possible type width in bits (1) seems a suitable upper bound to preserve the spirit of the assert
That's make sense. I understand now. Thank you for explanations.
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https://reviews.llvm.org/D91518
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