[PATCH] D91518: [LV][NFC-ish] Allow vector widths over 256 elements

[Florian Hahn via Phabricator via llvm-commits]

fhahn accepted this revision.
fhahn added a comment.
This revision is now accepted and ready to land.

In D91518#2404870 <https://reviews.llvm.org/D91518#2404870>, @kaz7 wrote:

> I thought it's a good idea when I hear it from @fhahn, but...  I think It's not a good idea since 1) `WidestRegister` holds bit width, 2) `MaxVectorSize` is calculated from `TTI->getRegisterBitWidth` anyway.

I think it somewhat preserves the spirit of the assertion, which IIUC was added to ensure none of the calculations above go rouge on lead to huge vectorization factors. The way the computation is supposed to work, dividing the widest register in bits by the smallest possible type width in bits (1) seems a suitable upper bound to preserve the spirit of the assert (I'd say it's debatable whether the assert itself adds a lot of protection, but it does at least add a little bit).

This LGTM, but happy to discuss this further.


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https://reviews.llvm.org/D91518