[llvm] 7a8b2f6 - [DAGCombiner] Precommit Sext Tests for D91589
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Wed Nov 18 07:56:41 PST 2020
Author: Simon Pilgrim
Date: 2020-11-18T15:56:16Z
New Revision: 7a8b2f692ec48f515e99572f911e15a86823ed1b
URL: https://github.com/llvm/llvm-project/commit/7a8b2f692ec48f515e99572f911e15a86823ed1b
DIFF: https://github.com/llvm/llvm-project/commit/7a8b2f692ec48f515e99572f911e15a86823ed1b.diff
LOG: [DAGCombiner] Precommit Sext Tests for D91589
Patch by: @laytonio (Layton Kifer)
Differential Revision: https://reviews.llvm.org/D91671
Added:
llvm/test/CodeGen/SystemZ/sext-zext.ll
Modified:
llvm/test/CodeGen/RISCV/sext-zext-trunc.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/RISCV/sext-zext-trunc.ll b/llvm/test/CodeGen/RISCV/sext-zext-trunc.ll
index 53e68f5e95d7..2c7a9b13342c 100644
--- a/llvm/test/CodeGen/RISCV/sext-zext-trunc.ll
+++ b/llvm/test/CodeGen/RISCV/sext-zext-trunc.ll
@@ -436,3 +436,134 @@ define i32 @trunc_i64_to_i32(i64 %a) nounwind {
%1 = trunc i64 %a to i32
ret i32 %1
}
+
+;; TODO: fold (sext (not x)) -> (add (zext x) -1)
+define i32 @sext_of_not_i32(i1 %x) {
+; RV32I-LABEL: sext_of_not_i32:
+; RV32I: # %bb.0:
+; RV32I-NEXT: not a0, a0
+; RV32I-NEXT: andi a0, a0, 1
+; RV32I-NEXT: neg a0, a0
+; RV32I-NEXT: ret
+;
+; RV64I-LABEL: sext_of_not_i32:
+; RV64I: # %bb.0:
+; RV64I-NEXT: not a0, a0
+; RV64I-NEXT: andi a0, a0, 1
+; RV64I-NEXT: neg a0, a0
+; RV64I-NEXT: ret
+ %xor = xor i1 %x, 1
+ %sext = sext i1 %xor to i32
+ ret i32 %sext
+}
+
+define i64 @sext_of_not_i64(i1 %x) {
+; RV32I-LABEL: sext_of_not_i64:
+; RV32I: # %bb.0:
+; RV32I-NEXT: not a0, a0
+; RV32I-NEXT: andi a0, a0, 1
+; RV32I-NEXT: neg a0, a0
+; RV32I-NEXT: mv a1, a0
+; RV32I-NEXT: ret
+;
+; RV64I-LABEL: sext_of_not_i64:
+; RV64I: # %bb.0:
+; RV64I-NEXT: not a0, a0
+; RV64I-NEXT: andi a0, a0, 1
+; RV64I-NEXT: neg a0, a0
+; RV64I-NEXT: ret
+ %xor = xor i1 %x, 1
+ %sext = sext i1 %xor to i64
+ ret i64 %sext
+}
+
+;; TODO: fold (sext (not (setcc a, b, cc))) -> (sext (setcc a, b, !cc))
+define i32 @sext_of_not_cmp_i32(i32 %x) {
+; RV32I-LABEL: sext_of_not_cmp_i32:
+; RV32I: # %bb.0:
+; RV32I-NEXT: addi a0, a0, -7
+; RV32I-NEXT: snez a0, a0
+; RV32I-NEXT: neg a0, a0
+; RV32I-NEXT: ret
+;
+; RV64I-LABEL: sext_of_not_cmp_i32:
+; RV64I: # %bb.0:
+; RV64I-NEXT: slli a0, a0, 32
+; RV64I-NEXT: srli a0, a0, 32
+; RV64I-NEXT: addi a0, a0, -7
+; RV64I-NEXT: snez a0, a0
+; RV64I-NEXT: neg a0, a0
+; RV64I-NEXT: ret
+ %cmp = icmp eq i32 %x, 7
+ %xor = xor i1 %cmp, 1
+ %sext = sext i1 %xor to i32
+ ret i32 %sext
+}
+
+define i64 @sext_of_not_cmp_i64(i64 %x) {
+; RV32I-LABEL: sext_of_not_cmp_i64:
+; RV32I: # %bb.0:
+; RV32I-NEXT: xori a0, a0, 7
+; RV32I-NEXT: or a0, a0, a1
+; RV32I-NEXT: snez a0, a0
+; RV32I-NEXT: neg a0, a0
+; RV32I-NEXT: mv a1, a0
+; RV32I-NEXT: ret
+;
+; RV64I-LABEL: sext_of_not_cmp_i64:
+; RV64I: # %bb.0:
+; RV64I-NEXT: addi a0, a0, -7
+; RV64I-NEXT: snez a0, a0
+; RV64I-NEXT: neg a0, a0
+; RV64I-NEXT: ret
+ %cmp = icmp eq i64 %x, 7
+ %xor = xor i1 %cmp, 1
+ %sext = sext i1 %xor to i64
+ ret i64 %sext
+}
+
+;; TODO: fold (add (zext (setcc a, b, cc)), -1) -> (sext (setcc a, b, !cc))
+define i32 @dec_of_zexted_cmp_i32(i32 %x) {
+; RV32I-LABEL: dec_of_zexted_cmp_i32:
+; RV32I: # %bb.0:
+; RV32I-NEXT: addi a0, a0, -7
+; RV32I-NEXT: seqz a0, a0
+; RV32I-NEXT: addi a0, a0, -1
+; RV32I-NEXT: ret
+;
+; RV64I-LABEL: dec_of_zexted_cmp_i32:
+; RV64I: # %bb.0:
+; RV64I-NEXT: slli a0, a0, 32
+; RV64I-NEXT: srli a0, a0, 32
+; RV64I-NEXT: addi a0, a0, -7
+; RV64I-NEXT: seqz a0, a0
+; RV64I-NEXT: addi a0, a0, -1
+; RV64I-NEXT: ret
+ %cmp = icmp eq i32 %x, 7
+ %zext = zext i1 %cmp to i32
+ %dec = sub i32 %zext, 1
+ ret i32 %dec
+}
+
+define i64 @dec_of_zexted_cmp_i64(i64 %x) {
+; RV32I-LABEL: dec_of_zexted_cmp_i64:
+; RV32I: # %bb.0:
+; RV32I-NEXT: xori a0, a0, 7
+; RV32I-NEXT: or a0, a0, a1
+; RV32I-NEXT: seqz a1, a0
+; RV32I-NEXT: addi a0, a1, -1
+; RV32I-NEXT: sltu a1, a0, a1
+; RV32I-NEXT: addi a1, a1, -1
+; RV32I-NEXT: ret
+;
+; RV64I-LABEL: dec_of_zexted_cmp_i64:
+; RV64I: # %bb.0:
+; RV64I-NEXT: addi a0, a0, -7
+; RV64I-NEXT: seqz a0, a0
+; RV64I-NEXT: addi a0, a0, -1
+; RV64I-NEXT: ret
+ %cmp = icmp eq i64 %x, 7
+ %zext = zext i1 %cmp to i64
+ %dec = sub i64 %zext, 1
+ ret i64 %dec
+}
diff --git a/llvm/test/CodeGen/SystemZ/sext-zext.ll b/llvm/test/CodeGen/SystemZ/sext-zext.ll
new file mode 100644
index 000000000000..9e2d3bf27742
--- /dev/null
+++ b/llvm/test/CodeGen/SystemZ/sext-zext.ll
@@ -0,0 +1,46 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
+
+;; TODO: fold (sext (not x)) -> (add (zext x) -1)
+define i32 @sext_of_not(i1 %x) {
+; CHECK-LABEL: sext_of_not:
+; CHECK: # %bb.0:
+; CHECK-NEXT: xilf %r2, 4294967295
+; CHECK-NEXT: nilf %r2, 1
+; CHECK-NEXT: lcr %r2, %r2
+; CHECK-NEXT: br %r14
+ %xor = xor i1 %x, 1
+ %sext = sext i1 %xor to i32
+ ret i32 %sext
+}
+
+;; TODO: fold (sext (not (setcc a, b, cc))) -> (sext (setcc a, b, !cc))
+define i32 @sext_of_not_cmp(i32 %x) {
+; CHECK-LABEL: sext_of_not_cmp:
+; CHECK: # %bb.0:
+; CHECK-NEXT: chi %r2, 7
+; CHECK-NEXT: ipm %r2
+; CHECK-NEXT: afi %r2, 1879048192
+; CHECK-NEXT: sra %r2, 31
+; CHECK-NEXT: br %r14
+ %cmp = icmp eq i32 %x, 7
+ %xor = xor i1 %cmp, 1
+ %sext = sext i1 %xor to i32
+ ret i32 %sext
+}
+
+;; TODO: fold (add (zext (setcc a, b, cc)), -1) -> (sext (setcc a, b, !cc))
+define i32 @dec_of_zexted_cmp(i32 %x) {
+; CHECK-LABEL: dec_of_zexted_cmp:
+; CHECK: # %bb.0:
+; CHECK-NEXT: chi %r2, 7
+; CHECK-NEXT: ipm %r2
+; CHECK-NEXT: afi %r2, -268435456
+; CHECK-NEXT: srl %r2, 31
+; CHECK-NEXT: ahi %r2, -1
+; CHECK-NEXT: br %r14
+ %cmp = icmp eq i32 %x, 7
+ %zext = zext i1 %cmp to i32
+ %dec = sub i32 %zext, 1
+ ret i32 %dec
+}
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