[PATCH] D91636: [AMDGPU] Fix and extend vccz workarounds

[Piotr Sobczak via Phabricator via llvm-commits]

piotr added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp:1435-1442
+  if (ST->hasReadVCCZBug())
+    // vccz could be incorrect at a basic block boundary if a predecessor wrote
+    // to vcc and then issued an smem load.
+    VCCZCorrect = false;
+  else if (!ST->partialVCCWritesUpdateVCCZ())
+    // vccz could be incorrect at a basic block boundary if a predecessor wrote
+    // to vcc_lo or vcc_hi.
----------------
Nit: braces around multi-line blocks?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D91636/new/

https://reviews.llvm.org/D91636