[PATCH] D91636: [AMDGPU] Fix and extend vccz workarounds

[Jay Foad via Phabricator via llvm-commits]

foad added inline comments.


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Comment at: llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp:1477
+          VCCZCorrect = false;
+      } else if (Inst.definesRegister(AMDGPU::VCC)) {
         // There is a hardware bug on CI/SI where SMRD instruction may corrupt
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arsenm wrote:
> foad wrote:
> > arsenm wrote:
> > > Could you have DefVCCLo && DefVCCHi?
> > I'm not sure what you're asking. But this particular bit of logic (if defines vcc_lo or vcc_hi ... else if defines vcc ...) hasn't changed, it has just moved up from line 1488, and it was previously discussed here: https://reviews.llvm.org/D69661#inline-627569
> I mean call definesRegister 2x instead of 3x
No, because a def of $vcc does not satisfy Inst.definesRegister(AMDGPU::VCC_LO) or Inst.definesRegister(AMDGPU::VCC_HI). And I'm relying on that here, otherwise the "else if" part would be dead code.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D91636/new/

https://reviews.llvm.org/D91636