[PATCH] D89239: [RISCV][PrologEpilogInserter] "Float" emergency spill slots to avoid making them immediately unreachable from the stack pointer

Roger Ferrer Ibanez via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Nov 13 00:53:48 PST 2020


rogfer01 added inline comments.


================
Comment at: llvm/lib/CodeGen/PrologEpilogInserter.cpp:1092
+      int64_t Delta = Offset - OffsetBeforeAlignment;
+      for (SmallVectorImpl<int>::iterator I = SFIs.begin(), IE = SFIs.end();
+           I != IE; ++I) {
----------------
sdesmalen wrote:
> Is this approach the same as setting the alignment of the last SFI to StackAlign?
Not sure I understood you comment.

This removes the additional offset that was introduced in line 1081 for all the SFIs, not only the last one.


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Comment at: llvm/test/CodeGen/RISCV/out-of-reach-emergency-slot.mir:1
+# NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+# REQUIRES: asserts
----------------
arichardson wrote:
> sdesmalen wrote:
> > This test seems quite substantial, is there no simpler IR to test this?
> This test can definitely be reduced a lot more. Also you could run just this pass and make it a MIR test instead.
The test is already an MIR test. The YAML representation contains a copy of the IR (which it is required to create essential data structures such as `llvm::Function`). I can remove most of it as I understand adds none to little information here.

I will look into how to reduce the large amount of machine instructions: part of the difficulty is making sure no register is left for the register scavenger when eliminating the frame index of the problematic stack slot (the one that used to be, before this change, too far from the top of the stack).

I'll look into this again because I think it is possible to do so.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D89239/new/

https://reviews.llvm.org/D89239



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