[PATCH] D89449: [RISCV] Initial infrastructure for code generation of the RISC-V V-extension

[Craig Topper via Phabricator via llvm-commits]

craig.topper added a comment.

This patch doesn't apply cleanly to trunk. Especially RISCVRegisterInfo.td



================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:1545
+       .addReg(MI.getOperand(VLIndex).getReg());
+  }
+  else {
----------------
else should be on the same line as the closing curly brace above


================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:1559
+  MIB.addImm(((Multiplier & 0x4) << 3) |
+	     ((ElementWidth & 0x3) << 2) |
+             (Multiplier & 0x3));
----------------
Is this from clang-format? I would have expected ElementWidth to line up more with Multiplier on the previous line.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D89449/new/

https://reviews.llvm.org/D89449