[PATCH] D90844: [TableGen][SchedModels] Fix read/write variant substitution #2

Sat Nov 7 10:25:54 PST 2020

dmgreen added a comment.

I'm not sure if I see how both halves are related here. Is this a problem that you found, so you altered the A57 to show that issue, so the tablegen code fixes the issue?

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Comment at: llvm/lib/Target/ARM/ARMScheduleA57.td:180
 // May be an error in doc.
-def A57WriteALUsi : SchedWriteVariant<[
-  // lsl #2, lsl #1, or lsr #1.
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This is "Move, shift by immed, no setflags"  _and_  "Move, shift by immed, setflags"?
I agree that the predicated pred should not matter, but there probably should be some difference between flag setting and not.

I think the TODO above is referring to A57WriteALUSsr? I'm not sure why A57WriteALUsr is treated the same way though. From what I can see it should be using  A57Write_1cyc_1.

Is A57ReadALUsr worth keeping around?

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D90844/new/

https://reviews.llvm.org/D90844