[PATCH] D90092: [AVR] Optimize 16-bit int shift

[Ben Shi via Phabricator via llvm-commits]

benshi001 added a comment.

Logic left and right shifts get improved with shift amount 4 ~ 15.
Arithmetic right shift gets improved with shift amount 8-15.

Though they are not in the best form as avr-gcc generates, current llvm code gets big improvement against itself.

I will continue to optimize 16-bit int shifts in future patches.


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  https://reviews.llvm.org/D90092/new/

https://reviews.llvm.org/D90092