[PATCH] D90861: [NVPTX] [TableGen] Use new features of TableGen to simplify and clarify
Paul C. Anagnostopoulos via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Nov 5 10:27:22 PST 2020
Paul-C-Anagnostopoulos added inline comments.
================
Comment at: llvm/lib/Target/NVPTX/NVPTXIntrinsics.td:60
class THREADMASK_INFO<bit sync> {
- list<bit> ret = !if(sync, [0,1], [0]);
+ list<bit> ret = !if(sync, [false,true], [false]);
}
----------------
tra wrote:
> I'd probably keep this as `0/1`. IMO it's more suitable for a **bit**mask of threads.
Yes, I'm trying to make that distinction carefully.
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D90861/new/
https://reviews.llvm.org/D90861
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