[PATCH] D90826: [RISCV] Add isel patterns for fshl with immediate to select FSRI/FSRIW

[Craig Topper via Phabricator via llvm-commits]

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There is no FSLI instruction, but we can emulate it using FSRI by swapping operands and subtracting the immediate from the bitwidth.

Hopefully I've accounted for the operand order correctly here.


https://reviews.llvm.org/D90826

Files:
  llvm/lib/Target/RISCV/RISCVInstrInfoB.td
  llvm/test/CodeGen/RISCV/rv32Zbb.ll
  llvm/test/CodeGen/RISCV/rv32Zbbp.ll
  llvm/test/CodeGen/RISCV/rv32Zbt.ll
  llvm/test/CodeGen/RISCV/rv64Zbt.ll

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