[PATCH] D90678: [AVR] Optimize 8-bit int shift

[Ben Shi via Phabricator via llvm-commits]

benshi001 added a comment.

Now llvm-avr generates the same asm for 8-bit shifts when ShiftAmount = 1,2,3,4,5,6, 7.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D90678/new/

https://reviews.llvm.org/D90678