[PATCH] D89047: [AVR] Optimize 8-bit logic left/right shifts

Ben Shi via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Nov 3 05:19:40 PST 2020


benshi001 added a comment.

ShiftAmount = 7 is implemented in  https://reviews.llvm.org/D90678 .

Now llvm-avr generates the same asm for 8-bit shifts when ShiftAmount = 1,2,3,4,5,6, 7.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D89047/new/

https://reviews.llvm.org/D89047



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