[PATCH] D90527: [GlobalISel] ComputeKnownBits - minimum leading/trailing zero bits in shifts (PR44526)
Matt Arsenault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Nov 2 09:35:31 PST 2020
arsenm added inline comments.
================
Comment at: llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp:388
case TargetOpcode::G_SHL: {
KnownBits RHSKnown;
+ computeKnownBitsImpl(MI.getOperand(1).getReg(), Known, DemandedElts,
----------------
I thought there was a move towards moving the shared implementation of these into KnownBits::. Is there a reason this needs to be repeated here?
================
Comment at: llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp:396
+ case TargetOpcode::G_ASHR:
+ // No matter the shift amount, the leading signbits will remain.
+ if (Known.isNegative()) {
----------------
s/signbits/sign bits/
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D90527/new/
https://reviews.llvm.org/D90527
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