[PATCH] D89956: [AArch64] Redundant masks in downcast long multiply

Dave Green via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Nov 2 07:43:50 PST 2020


dmgreen added inline comments.


================
Comment at: llvm/lib/Target/AArch64/AArch64InstrInfo.td:1483
+          (SMADDLrrr (EXTRACT_SUBREG $Rn, sub_32), $Rm, XZR)>;
+def : Pat<(i64 (mul (sext_inreg GPR64:$Rn, i32), (zext GPR32:$Rm))),
+          (SMADDLrrr (EXTRACT_SUBREG $Rn, sub_32), $Rm, XZR)>;
----------------
This pattern isn't needed I don't think. The other four you have here look good to me, but I would remove the whitespace and maybe reorder them.


================
Comment at: llvm/test/CodeGen/AArch64/aarch64-mull-masks.ll:24
+  %conv = zext i32 %y to i64
+  %mul = mul nuw nsw i64 %and, %conv
+  ret i64 %mul
----------------
Can you add a commuted test too, where the `and` and the `conv` are used the other way around. Same for smull. They should match automatically I think, with the patterns that are already here.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D89956/new/

https://reviews.llvm.org/D89956



More information about the llvm-commits mailing list