[PATCH] D90404: [AMDGPU] Add alignment check for v3 to v4 load type promotion

Matt Arsenault via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Oct 30 10:10:12 PDT 2020


arsenm added a comment.

I'm not sure how I follow that 8 byte alignment is sufficient


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D90404/new/

https://reviews.llvm.org/D90404



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