[PATCH] D90247: [AArch64] Add legalizations for VECREDUCE_SEQ_FADD

Cameron McInally via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Oct 28 11:59:54 PDT 2020


cameron.mcinally updated this revision to Diff 301360.
cameron.mcinally added a comment.

Updated patch with, I think, all the needed legalizations.

This patch touches both the ARM and AArch64 backends, to exercise all the different legalizations. If this is too much to review in one patch, we might want to split it up into two Diffs, even if there's a small window of unsupported legalizations in the wild. It should be relatively safe to split.

Also note that my confidence in the softening test changes is low. E.g. `@test_v4f32_strict`. Is it obvious to anyone if the new instruction sequences are bad?


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D90247/new/

https://reviews.llvm.org/D90247

Files:
  llvm/include/llvm/CodeGen/TargetLowering.h
  llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
  llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
  llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
  llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
  llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
  llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/lib/Target/AArch64/AArch64ISelLowering.h
  llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
  llvm/lib/Target/ARM/ARMISelLowering.cpp
  llvm/lib/Target/ARM/ARMTargetTransformInfo.h
  llvm/test/CodeGen/AArch64/sve-fixed-length-fp-reduce.ll
  llvm/test/CodeGen/AArch64/vecreduce-fadd-legalization-strict.ll
  llvm/test/CodeGen/ARM/vecreduce-fadd-legalization-soft-float.ll

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